Title :
An analytical crosstalk and delay model for VLSI RLC coupled interconnects
Author :
Maheshwari, V. ; Khare, Kavita ; Jha, Sumit Kumar ; Kar, Rajib ; Mandal, Durbadal
Author_Institution :
Dept. of ECE, Apeejay Stya Univ., Gurgaon, India
Abstract :
In this paper an analytical crosstalk and delay model for RLC interconnects are developed based on the first and second moments considering the inductance effect into the delay estimation for coupled interconnect lines. Crosstalk and delay estimation using the proposed model are within 1% of SPICE computed delay across a wide range of interconnect parameter values. An improvement in the accuracy of models when compared to the Elmore model (which is independent of inductance) is achieved even though our estimate is as easy to compute as that of the Elmore model. The speed up of delay estimation by the proposed analytical model is served by orders of magnitude when compared to a simulation methodology such as SPICE which gives the most accurate insight into arbitrary interconnect structure but are computationally expensive.
Keywords :
VLSI; crosstalk; delay estimation; integrated circuit interconnections; integrated circuit modelling; Elmore model; SPICE; VLSI RLC coupled interconnects; analytical crosstalk; arbitrary interconnect structure; coupled interconnect lines; delay estimation; delay model; Analytical models; Capacitance; Computational modeling; Delays; Frequency modulation; SPICE; Delay Calculation; Interconnect; RLC Coupled Line; VLSI;
Conference_Titel :
Advance Computing Conference (IACC), 2013 IEEE 3rd International
Conference_Location :
Ghaziabad
Print_ISBN :
978-1-4673-4527-9
DOI :
10.1109/IAdCC.2013.6514461