Title :
Realization of logic gates using Cmos Gilbert multiplier cell
Author_Institution :
Dept. of ECE, Tezpur Univ., Tezpur, India
Abstract :
Realization of logic gates using CMOS Gilbert multiplier cell is introduced. Power series expression of logic functions are implemented using Gilbert multiplier cell and pool circuit. To illustrate the proposed technique a circuit for simultaneous realization of logic functions NOT, AND, OR, XOR, NAND and NOR is considered. PSPICE simulation results with ±5V power supplies are given to demonstrate the feasibility of the proposed circuit. The proposed circuit is expected to be useful in analog digital and integrated circuits.
Keywords :
CMOS logic circuits; logic gates; CMOS Gilbert multiplier cell; PSPICE simulation; analog digital circuits; integrated circuits; logic function AND; logic function NAND; logic function NOR; logic function NOT; logic function OR; logic function XOR; logic gate realization; power series expression; voltage -5 V to 5 V; CMOS integrated circuits; Logic functions; Logic gates; Power supplies; SPICE; Simulation; Transistors; Gilbert multiplier cell; integrated circuits; logic gates; pool circuit; saturation;
Conference_Titel :
Advance Computing Conference (IACC), 2013 IEEE 3rd International
Conference_Location :
Ghaziabad
Print_ISBN :
978-1-4673-4527-9
DOI :
10.1109/IAdCC.2013.6514463
