Real-time MPEG2 encoding and decoding with a dual-issue RISC processor

Author

Yamada, A. ; Yoshida, T. ; Holmann, E. ; Matsumura, T. ; Uramoto, S.

Author_Institution

Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1997

fDate

5-8 May 1997

Firstpage

225

Lastpage

228

Abstract

A single chip system for real-time encoding and decoding for MPEG2, except for motion estimation, can be created by integrating two 250 MHz dual issue RISC processor cores with a small dedicated hardware for the variable length encoding/decoding (VLC/VLD) and block loading process. The estimated area for the encoder, 27.7 mm² using a 0.3-micrometer CMOS process, is 20% smaller than that of the dedicated hardware approach. An approach that uses dual issue RISC processors has the advantage of a smaller chip area and also that of being very easy to program for multimedia applications

Keywords

CMOS digital integrated circuits; decoding; microprocessor chips; reduced instruction set computing; video coding; 0.3 micron; 250 MHz; CMOS chip area; block loading; dual-issue RISC processor; multimedia application; real-time MPEG2 encoding; variable length decoding; variable length encoding; CMOS process; Decoding; Digital signal processing; Discrete cosine transforms; Encoding; Hardware; Motion estimation; Real time systems; Reduced instruction set computing; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-3669-0

Type

conf

DOI

10.1109/CICC.1997.606617

Filename

606617