DocumentCode :
2164671
Title :
Using context descriptions and property definition patterns for software formal verification
Author :
Dhaussy, P. ; Auvray, J. ; de Belloy, S. ; Boniol, F. ; Landel, Eric
Author_Institution :
Lab. DTN, ENSIETA, Brest
fYear :
2008
fDate :
9-11 April 2008
Firstpage :
89
Lastpage :
96
Abstract :
Systems verification requires first to model the system to be verified, then to formalize the properties to be satisfied, and finally to describe the behaviour of the environment. This last point, known as the proof context, is often neglected. It could, however, be of great importance in order to reduce the complexity of the proof. The question is then how to formalize such a proof context. This article review a language, named CDL (context description language), that is proposed for expressing formal specifications of an execution context, including attachment of properties to specific regions in this context. We show that such contexts can be translated into timed automata, and can then be integrated into a timed model checker. Our contribution is a report on several experiments that they have carried out on software from the aviation and military industries.
Keywords :
formal specification; object-oriented programming; program verification; theorem proving; context description language; formal specifications; proof context; property definition patterns; software formal verification; timed automata; Automata; Context modeling; Defense industry; Disruption tolerant networking; Embedded system; Explosions; Formal verification; Process design; Reliability engineering; State-space methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Testing Verification and Validation Workshop, 2008. ICSTW '08. IEEE International Conference on
Conference_Location :
Lillehammer
Print_ISBN :
978-0-7695-3388-9
Type :
conf
DOI :
10.1109/ICSTW.2008.52
Filename :
4566995
Link To Document :
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