Author :
Purushothaman, S. ; Nitta, S.V. ; Ryan, J.G. ; Narayan, C. ; Krishnan, M. ; Cohen, S. ; Gates, S. ; Whitehair, S. ; Hedrick, J. ; Tyberg, C. ; Greco, S. ; Rodbell, K. ; Huang, E. ; Dalton, T. ; DellaGuardia, R. ; Saenger, K. ; Simonyi, E. ; Chen, S.-T. ;
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
In this paper, we discuss the challenges associated with producing, characterizing and integrating porous dielectrics into back-end-of-line (BEOL) interconnects and present results from our integration evaluations.
Keywords :
dielectric thin films; integrated circuit interconnections; permittivity; porous materials; BEOL interconnect; ultra-low-k porous dielectric; Copper; Dielectric materials; Microelectronics; Morphology; Propagation delay; Research and development; Robust stability; Scanning electron microscopy; Silicon; System-on-a-chip;
