DocumentCode
2168599
Title
The use of a matrix cache to speed up the conventional transient simulation of piecewise linear circuits
Author
Leelarasmee, Ekachai ; Hwangkhunnatham, Methee
Author_Institution
Dept. of Electr. Eng., Chulalongkorn Univ., Bangkok, Thailand
fYear
1996
fDate
18-21 Nov 1996
Firstpage
73
Lastpage
76
Abstract
This paper presents a few techniques based on an efficient use of memory resources to speed up the transient analysis of piecewise linear circuits, such as power electronic circuits. These techniques use the fact that the matrix in the linear equation solving routines can only have a finite number of different values. Hence, by adding a cache memory management technique to store the LU factor of these matrices for future reuse, the linear equation solver can be performed much faster than that of a general purpose simulation program in which these LU factors have to be recomputed every time. Since most of the CPU analysis time is spent in solving linear equations, these techniques can actually speed up the transient analysis of piecewise linear circuits significantly (100-600%)
Keywords
cache storage; circuit analysis computing; matrix algebra; nonlinear network analysis; piecewise-linear techniques; power electronics; storage management; transient analysis; CPU analysis time; LU factor storage; PWL circuits; cache memory management technique; linear equation solver; matrix cache; memory resources; piecewise linear circuits; power electronic circuits; transient simulation; Analytical models; Central Processing Unit; Circuit simulation; Computational modeling; Diodes; Nonlinear equations; Piecewise linear techniques; Power electronics; Transient analysis; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996., IEEE Asia Pacific Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-3702-6
Type
conf
DOI
10.1109/APCAS.1996.569222
Filename
569222
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