DocumentCode :
2171045
Title :
Multi-clock Soc design using protocol conversion
Author :
Sinha, Roopak ; Roop, Partha S. ; Basu, Samik ; Salcic, Zoran
Author_Institution :
Univ. of Auckland, Auckland
fYear :
2009
fDate :
20-24 April 2009
Firstpage :
123
Lastpage :
128
Abstract :
The automated design of SoCs from pre-selected IPs that may require different clocks is challenging because of the following issues. Firstly, protocol mismatches between IPs need to be resolved automatically before IPs are integrated. Secondly, the presence of multiple clocks makes the protocol conversion even more difficult. Thirdly, it is desirable that the resulting integration is correct-by-construction, i.e., the resulting SoC satisfies given system-level specifications. All of these issues have been studied extensively, although not in a unifying manner. In this paper we propose a framework based on protocol conversion that addresses all these issues. We have extensively studied many SoC design problems and show that the proposed methodology is capable of handling them better than other known approaches. A significant contribution of the proposed approach is that it nicely generalizes many existing techniques for formal SoC design and integrates them into a single approach.
Keywords :
integrated circuit design; protocols; system-on-chip; multiclock Soc design; preselected IP protocol; protocol conversion; system-level specification; Protocols;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
ISSN :
1530-1591
Print_ISBN :
978-1-4244-3781-8
Type :
conf
DOI :
10.1109/DATE.2009.5090644
Filename :
5090644
Link To Document :
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