Title :
Systolic implementation of linear-phase FIR filters
Author :
Abdel-Raheem, E. ; El-Guibaly, F. ; Tawfik, A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
Abstract :
A systematic method is used for mapping linear-phase FIR filter algorithms onto systolic hardware. The method is based on the z-domain characterization of the required filter and yields filter structures that are modular and pipelined. A special processor module is presented which performs an add-multiply-accumulate operation in the same time as a simple multiplier
Keywords :
delay circuits; digital filters; pipeline processing; systolic arrays; add-multiply-accumulate operation; filter algorithm mapping; linear-phase FIR filters; modular structure; pipelined structure; processor module; systolic implementation; z-domain characterization; Delay; Digital filters; Digital signal processing; Equations; Finite impulse response filter; Hardware; Pipeline processing; Signal processing; Signal processing algorithms; Systolic arrays;
Conference_Titel :
Electrical and Computer Engineering, 1993. Canadian Conference on
Conference_Location :
Vancouver, BC
Print_ISBN :
0-7803-2416-1
DOI :
10.1109/CCECE.1993.332387
