DocumentCode
2173263
Title
MPSoCs run-time monitoring through Networks-on-Chip
Author
Fiorin, Leandro ; Palermo, Gianluca ; Silvano, Cristina
Author_Institution
ALaRI, Univ. of Lugano, Lugano
fYear
2009
fDate
20-24 April 2009
Firstpage
558
Lastpage
561
Abstract
Networks-on-Chip (NoCs) have appeared as design strategy to overcome the limitations, in terms of scalability, efficiency, and power consumption of current buses. In this paper, we discuss the idea of using NoCs to monitor system behaviour at run-time by tracing activities at initiators and targets. Main goal of the monitoring system is to retrieve information useful for run-time optimization and resources allocation in adaptive systems. Information detected by probes embedded within NIs is sent to a central unit, in charge of collecting and elaborating the data. We detail the design of the basic blocks and analyse the overhead associated with the ASIC implementation of the monitoring system, as well as discussing implications in terms of the additional traffic generated in the NoC.
Keywords
application specific integrated circuits; microprocessor chips; monitoring; network-on-chip; resource allocation; system monitoring; ASIC implementation; MPSoCs; adaptive systems; information retrieval; monitoring system; networks-on-chip; resources allocation; run-time monitoring; run-time optimization; system behaviour monitoring; Adaptive systems; Application specific integrated circuits; Energy consumption; Information retrieval; Monitoring; Network-on-a-chip; Probes; Resource management; Runtime; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location
Nice
ISSN
1530-1591
Print_ISBN
978-1-4244-3781-8
Type
conf
DOI
10.1109/DATE.2009.5090726
Filename
5090726
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