• DocumentCode
    2174235
  • Title

    Hardware implementation of a FPGA-based universal link for LVDS communications

  • Author

    Sanchez, Luis ; Patino, Giancarlo ; Murray, Victor ; Lyke, James

  • Author_Institution
    Department of Electrical Engineering, Universidad de Ingenieria y Tecnologia, Lima, Peru
  • fYear
    2015
  • fDate
    24-27 Feb. 2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We present the first hardware implementation for a FPGA-based universal link for the transmission of different low-voltage differential signaling (LVDS) connections through a single LVDS connection between different devices. The main objective of this work is to reduce the number of wires in a network, for example in some satellites, with several groups of devices, to a single LVDS connection. This paper proposes a new communication protocol for successfully coding and decoding the data sent through the single connection. We propose a solution for one of the difficulties of LVDS standard due to the amount of wires needed for a duplex connection, significantly reducing the amount of wires required for a large network. The proposed solution has been implemented in an Atlys board with a Spartan 6 FPGA showing promising results.
  • Keywords
    Field programmable gate arrays; Frequency division multiplexing; Hardware; Optimization; Protocols; Wires; FPGA; LVDS; universal link;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits & Systems (LASCAS), 2015 IEEE 6th Latin American Symposium on
  • Conference_Location
    Montevideo, Uruguay
  • Type

    conf

  • DOI
    10.1109/LASCAS.2015.7250480
  • Filename
    7250480