An RRAM-based Oscillatory Neural Network

Oscillatory Neural Networks (ONNs) are an intriguing brain-inspired paradigm for massively parallel computing, but implementations in CMOS fail to produce competitive architecture performance. While representing each artificial neuron with a CMOS oscillator does not scale well in terms of power and area, we have recently demonstrated the design and fabrication of low-power, small-area voltage controlled oscillators based on metal-oxide resistive devices (RRAMs). The same RRAM materials have also been demonstrated as programmable nonvolatile resistors for use as artificial synapses [1]. In this paper, we propose a RRAM-based ONN that is based on the coupling of oscillatory “neurons” through weighted “synapses.” A few CMOS logic gates per neuron are required for the phase detection that is used to initialize the input pattern and lock to the correct stored pattern. Using measurement data for RRAM-based oscillators and synapses, compact models were derived and characterized for use in simulating an eight neuron proof-of-concept network.