DocumentCode :
2175077
Title :
Multiple serially concatenated single parity check codes
Author :
Tee, James S K ; Taylor, Desmond P.
Author_Institution :
Dept. of Electr. & Electron. Eng., Canterbury Univ., Christchurch, New Zealand
Volume :
2
fYear :
2000
fDate :
2000
Firstpage :
613
Abstract :
Single parity check (SPC) codes are applied in a serial concatenation structure to produce a high performance coding scheme with very low complexity. We show a simple yet elegant way of improving the system performance at low bit error rates (BER), without changing the overall code parameters (code rate, code block length). We compare its BER performance to the best 64-state convolutional codes, and the 16-state turbo codes. Comparisons show that its performance is only slightly poorer. Despite this inferior performance, the scheme is very suitable for practical implementation due to its flexible code parameters. We conclude by showing that its decoding complexity is more than 1 order of magnitude less than that of a 16-state turbo code
Keywords :
computational complexity; concatenated codes; convolutional codes; error statistics; modulation coding; quadrature amplitude modulation; turbo codes; 16-QAM; 16-state turbo codes; 64-state convolutional codes; BER performance; bit interleaved coded modulation; code block length; code parameters; code rate; decoding complexity; high performance coding; low bit error rates; low complexity system; multiple serially concatenated codes; single parity check codes; system performance; Bandwidth; Bit error rate; Channel capacity; Communication systems; Concatenated codes; Convolutional codes; Iterative decoding; Parity check codes; System performance; Turbo codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, 2000. ICC 2000. 2000 IEEE International Conference on
Conference_Location :
New Orleans, LA
Print_ISBN :
0-7803-6283-7
Type :
conf
DOI :
10.1109/ICC.2000.853569
Filename :
853569
Link To Document :
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