Low-voltage highly-linear transconductor design in subthreshold CMOS

Author

Furth, Paul M. ; Ommani, Henry A.

Author_Institution

Klipsch Sch. of Electr. & Comput. Eng., NM, USA

Volume

1

fYear

1997

fDate

3-6 Aug 1997

Firstpage

156

Abstract

We present four circuits implemented in subthreshold CMOS which greatly increase the linear range over the basic differential pair. These circuits are appropriate for low voltage applications since there is no stacking of saturated transistors. The first circuit topology employs multiple asymmetric differential pairs. The second is a symmetric “bump” transconductor. The remaining two use source degeneration via double diffusers. These circuits are analyzed and optimized using a symbolic simulation package and verified in T-SPICE. A linear range of ±49 mV is demonstrated for the two most complex transconductor designs using a 2-Volt supply

Keywords

CMOS analogue integrated circuits; SPICE; circuit analysis computing; continuous time filters; differential amplifiers; digital simulation; network topology; -49 to 49 mV; 2 V; T-SPICE; circuit topology; continuous-time filters; double diffusers; highly-linear transconductor design; low voltage applications; multiple asymmetric differential pairs; source degeneration; subthreshold CMOS; symbolic simulation package; symmetric bump transconductor; CMOS technology; Circuit analysis; Circuit simulation; Circuit topology; Delta modulation; Equations; Filters; MOSFET circuits; Transconductance; Transconductors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on

Conference_Location

Sacramento, CA

Print_ISBN

0-7803-3694-1

Type

conf

DOI

10.1109/MWSCAS.1997.666057

Filename

666057