Implementation of DVB-RCS turbo decoder for satellite on-board processing

Author

Bartolazzi, A. ; Cardarilli, G. ; Del Re, A. ; Giancristofaro, D. ; Re, A. Del

Author_Institution

Alenia Aerospazio, Rome, Italy

fYear

2002

fDate

26-28 June 2002

Firstpage

142

Lastpage

145

Abstract

The objective of the present paper is to provide a description of a turbo decoding algorithm for turbo codes standardised for DVB-RCS. It also presents the associated design architecture implemented in very high speed integrated circuit hardware description language (VHDL), as well as synthesis on a specific field programmable gate array (FPGA). The decoding structure was tested using a rapid prototyping system based on high-density Xilinx FPGAs.

Keywords

decoding; digital video broadcasting; direct broadcasting by satellite; field programmable gate arrays; hardware description languages; rapid prototyping (industrial); turbo codes; very high speed integrated circuits; DVB-RCS turbo decoder; VHDL; design architecture; field programmable gate array; hardware description language; high-density Xilinx FPGAs; rapid prototyping system; satellite on-board processing; very high speed integrated circuit; Circuit testing; Decoding; Digital video broadcasting; Field programmable gate arrays; Hardware design languages; Integrated circuit synthesis; Satellites; System testing; Turbo codes; Very high speed integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems for Communications, 2002. Proceedings. ICCSC '02. 1st IEEE International Conference on

Conference_Location

St. Petersburg, Russia

Print_ISBN

5-7422-0260-1

Type

conf

DOI

10.1109/OCCSC.2002.1029065

Filename

1029065