DocumentCode
2178202
Title
A 1.2 μ BiCMOS realization of delta-sigma modulator with integrator using unity-gain buffer
Author
Llaser, N. ; Megherbi, S. ; Põne, J.H.
Author_Institution
Inst. d´´Electron. Fondamentale, Univ. de Paris-Sud, Orsay, France
Volume
1
fYear
1997
fDate
3-6 Aug 1997
Firstpage
301
Abstract
In this paper, a delta sigma modulator using a unity-gain buffer is presented. The advantage of using unity-gain buffer is to permit the increase of their sampling frequency. The delta sigma modulator is realized in a 1.2 μm BiCMOS technology. The result of testing validates the feasibility of the delta sigma converter with this structure and shows at the same time its limits and disadvantages
Keywords
BiCMOS integrated circuits; buffer circuits; integrating circuits; mixed analogue-digital integrated circuits; modulators; sigma-delta modulation; 1.2 micron; BiCMOS realization; delta-sigma modulator; integrator; sampling frequency; unity-gain buffer; BiCMOS integrated circuits; Capacitors; Delta modulation; Delta-sigma modulation; Frequency; Parasitic capacitance; Sampling methods; Switches; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Conference_Location
Sacramento, CA
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.666093
Filename
666093
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