A longest prefix match search engine for multi-gigabit IP processing

Author

Kobayashi, Masayoshi ; Murase, Tutomu ; Kuriyama, Atsushi

Author_Institution

C&C Media Res. Labs., NEC Corp., Japan

Volume

3

fYear

2000

fDate

2000

Firstpage

1360

Abstract

We propose an IP forwarding table search engine architecture, VLMP (vertical logical operation with mask-encoded prefix-length), for routers with multi-gigabit/sec speed links. We discuss the existing approaches and the requirements for search engines, and go on to propose VLMP search engine architecture that expands upon a content addressable memory (CAM) and can perform wire-speed packet processing of an OC-192 (9.6 Gb/s) link. In this architecture, prefixes can be stored in arbitrary order, while existing ternary CAMs require prefixes to be stored in the order of their lengths. Also presented is a newly developed search LSI in which the architecture is implemented

Keywords

CMOS integrated circuits; Internet; large scale integration; packet switching; protocols; search problems; telecommunication network routing; 9.6 Gbit/s; IP forwarding table search engine architecture; LSI; OC-192; VLMP; architecture; content addressable memory; longest prefix match search engine; multi-gigabit IP processing; routers; vertical logical operation with mask-encoded prefix-length; wire-speed packet processing; Associative memory; CADCAM; Computer aided manufacturing; Explosives; Laboratories; Large scale integration; National electric code; Protocols; Search engines; Telecommunication traffic;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, 2000. ICC 2000. 2000 IEEE International Conference on

Conference_Location

New Orleans, LA

Print_ISBN

0-7803-6283-7

Type

conf

DOI

10.1109/ICC.2000.853719

Filename

853719