DocumentCode
2184045
Title
Efficient structural adder pipelining in transposed form FIR filters
Author
Faust, Mathias ; Kumm, Martin ; Chang, Chip-Hong ; Zipf, Peter
Author_Institution
School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore
fYear
2015
fDate
21-24 July 2015
Firstpage
311
Lastpage
314
Abstract
Pipelining is a common method to implement high speed FIR filters. While the efficient pipelining of multiplications is well understood, no attention has been paid on the pipelining of structural adders so far. The delay of structural adders becomes crucial in high speed designs as they have the largest word size in non-truncated FIR filters and typically lie in the critical path. The common pipelining method results in an excessive overhead in registers when applied to the structural adders as many additional paths have to be delayed. An efficient method for pipelining structural adders using a partially redundant number representation is proposed in this paper. With a very little area overhead of 5.4%, the throughput of the structural adders can be doubled while a speedup factor of up to 7 can be achieved with an area overhead of 26.7%.
Keywords
Adders; Delays; Finite impulse response filters; Optimization; Pipeline processing; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Signal Processing (DSP), 2015 IEEE International Conference on
Conference_Location
Singapore, Singapore
Type
conf
DOI
10.1109/ICDSP.2015.7251882
Filename
7251882
Link To Document