• DocumentCode
    2184356
  • Title

    Simulation analysis of cluster tool operations in wafer fabrication

  • Author

    Gupta, Amit Kumar ; Lendermann, Peter ; Sivakumar, Appa Iyer ; Priyadi, John

  • Author_Institution
    Dept. of Mech. Eng., BITS-Pilani, Hyderabad, India
  • fYear
    2008
  • fDate
    7-10 Dec. 2008
  • Firstpage
    2141
  • Lastpage
    2147
  • Abstract
    Cluster tools have been one of the proposed alternatives to improve operations performance in semiconductor fabrication. The benefits include high yield throughput, less contamination and less human involvement. Perkinson et al. (1994, 1996) developed analytical models to predict the minimum theoretical time required to complete the cycle in a cluster tool. This paper addresses the verification of these analytical models using simulation. Two simulation models were developed - one with simple configuration and another one that incorporates parallel chambers. The implementation of parallel chambers for the longest process in the cluster tool is tested as the potential area of performance improvement.
  • Keywords
    semiconductor device manufacture; cluster tool operations; parallel chambers; semiconductor fabrication; simulation analysis; wafer fabrication; Analytical models; Contamination; Fabrication; Humans; Mechanical engineering; Performance analysis; Semiconductor device testing; Steady-state; Throughput; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation Conference, 2008. WSC 2008. Winter
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-2707-9
  • Electronic_ISBN
    978-1-4244-2708-6
  • Type

    conf

  • DOI
    10.1109/WSC.2008.4736312
  • Filename
    4736312