• DocumentCode
    2186186
  • Title

    The Study of Impact of Matrix-Processor Mapping on the Parallel Sparse Matrix-Vector Multiplication

  • Author

    Imecek, I. ; Langr, Daniel ; Srnec, Erik

  • Author_Institution
    Dept. of Comput. Syst., Czech Tech. Univ. in Prague, Prague, Czech Republic
  • fYear
    2013
  • fDate
    23-26 Sept. 2013
  • Firstpage
    321
  • Lastpage
    328
  • Abstract
    Sparse matrix-vector multiplication (shortly spM × V) is one of the most common subroutines in the numerical linear algebra. The parallelization of this task looks easy and straightforward, but it is not optimal in general case. This paper discuss some matrix-processor mappings and their impact on parallel spM × V execution on massively parallel systems. We try to balance the performance and the overhead of the required transformation. We also present algorithms for redistribution. We propose four quality measures and derive lower and upper bound for different mappings. Our spM × V algorithms are scalable for almost all matrices arising from various technical areas.
  • Keywords
    linear algebra; matrix multiplication; parallel algorithms; sparse matrices; matrix-processor mappings; numerical linear algebra; parallel spM × V execution; parallel sparse matrix-vector multiplication; parallel systems; parallelization; quality measures; spM × V algorithms; subroutines; Arrays; Program processors; Silicon; Sparse matrices; Time complexity; Vectors; matrix-processor mapping; parallel execution; scalability; sparse matrix representation; sparse matrix-vector multiplication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Symbolic and Numeric Algorithms for Scientific Computing (SYNASC), 2013 15th International Symposium on
  • Conference_Location
    Timisoara
  • Print_ISBN
    978-1-4799-3035-7
  • Type

    conf

  • DOI
    10.1109/SYNASC.2013.49
  • Filename
    6821166