DocumentCode
2187652
Title
Test Considerations about the Structured ASIC Paradigm
Author
Bernardi, P. ; Grosso, M.
Author_Institution
Dip. Automatica e Informatica, Politecnico di Torino
fYear
2006
fDate
18-21 April 2006
Firstpage
230
Lastpage
231
Abstract
We present a survey on the academic and industrial structured ASIC practices, especially focusing on the test strategies currently in use. Then, we compare two possible test generation flows, underlining the most critical aspects introduced by the adoption of the structured ASIC methodology
Keywords
application specific integrated circuits; automatic test pattern generation; integrated circuit testing; automatic test pattern generation; integrated circuit testing; structured ASIC paradigm; test strategies; Application specific integrated circuits; Circuit synthesis; Circuit testing; Costs; Design for testability; Field programmable gate arrays; Flip-flops; Manufacturing industries; Metallization; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits and systems, 2006 IEEE
Conference_Location
Prague
Print_ISBN
1-4244-0185-2
Type
conf
DOI
10.1109/DDECS.2006.1649622
Filename
1649622
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