DocumentCode :
2190794
Title :
Proceedings of the 2005 IEEE International Behavioral Modeling and Simulation Workshop (IEEE Cat. No.05TH8833)
fYear :
2005
fDate :
22-23 Sept. 2005
Abstract :
The following topics are dealt with: circuit behavioural model design; circuit simulation; PLL; circuit optimization; phase locked loops; integrated circuit modelling; Verilog; hardware description languages; circuit layout design.
Keywords :
circuit optimisation; circuit simulation; hardware description languages; integrated circuit design; integrated circuit modelling; phase locked loops; PLL; Verilog; circuit behavioural model design; circuit layout design; circuit optimization; circuit simulation; hardware description languages; integrated circuit modelling; phase locked loops;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Behavioral Modeling and Simulation Workshop, 2005. BMAS 2005. Proceedings of the 2005 IEEE International
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-9352-X
Type :
conf
DOI :
10.1109/BMAS.2005.1518173
Filename :
1518173
Link To Document :
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