The first integration test of the ATLAS end-cap muon level 1 trigger system

A sliced test (SLT) system has been constructed for the ATLAS, one of the flour LHC experiments, end-cap muon level-1 (LVL1) trigger. Although the system has been constructed using yet prototype ASICs or electronics modules, the design scheme of the trigger, readout as well as control logics applied to the system is the final one. The size is about 1/300 of the whole number of channels. The purpose to construct the present integrated system is to confirm the system design even very in detail, and to measure the performance before the final production of all the ingredients are launched. In this paper we discuss the validity of the logics through the comparison of the simulation results, the latency measurement and long run tests.