Title :
Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002)
Keywords :
EPROM; built-in self test; error correction; fault diagnosis; integrated circuit design; integrated circuit reliability; integrated circuit technology; integrated circuit testing; integrated circuit yield; integrated memory circuits; logic testing; EEPROM design; EPROM design; automotive system reliability; embedded memory compilers; embedded memory systems; embedded memory yield enhancement; fault modeling; memory BIST analysis; memory ECC; memory test strategies; process technology; railway system reliability; soft errors; test optimization;
Conference_Titel :
Memory Technology, Design and Testing, 2002. (MTDT 2002). Proceedings of the 2002 IEEE International Workshop on
Conference_Location :
Isle of Bendor, France
Print_ISBN :
0-7695-1617-3
DOI :
10.1109/MTDT.2002.1029755
