DocumentCode
2196557
Title
Improved vein pattern extracting algorithm and its implementation
Author
Sang-Kyun Im ; Hyung-Man Park ; Soo-Won Kim ; Chang-Kyung Chung ; Hwan-Soo Choi
Author_Institution
ASIC Design Lab., Korea Univ., Seoul, South Korea
fYear
2000
fDate
13-15 June 2000
Firstpage
2
Lastpage
3
Abstract
This paper proposes an improved vein pattern extracting algorithm which compensates the loss of vein patterns in the edge area, gives more enhanced and stabilized vein pattern information, and shows better performance than the existing algorithm. Also, the problem arising from the iterative nature of the filtering preprocess in the existing algorithm is solved by designing a filter that is processed only one time so that a fast recognition speed and reduced hardware complexity is obtained. The proposed algorithm is implemented with a FPGA (field programmable gate array) device and the FAR (false acceptance rate) shows five times batter than the existing algorithm and the recognition speed is measured to be 100 [ms/person].
Keywords
Biometrics (access control); Feature extraction; Field programmable gate arrays; Filtering theory; Iterative methods; Pattern recognition; application specific processor; biometric identification systems; biometric security systems; edge area; false acceptance rate; fast recognition speed; field programmable gate array; filter design; hand; iterative filtering; performance; reduced hardware complexity; stabilized vein pattern information; vein identification system; vein pattern extracting algorithm; Algorithm design and analysis; Data mining; Field programmable gate arrays; Filtering algorithms; Filters; Hardware; Iterative algorithms; Performance loss; Veins; Velocity measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2000. ICCE. 2000 Digest of Technical Papers. International Conference on
Conference_Location
Los Angles, CA, USA
Print_ISBN
0-7803-6301-9
Type
conf
DOI
10.1109/ICCE.2000.854470
Filename
854470
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