• DocumentCode
    2197705
  • Title

    Experimental Results of Transition Fault Simulation with DC Scan Tests

  • Author

    Kawamura, Wataru ; Onodera, Takeshi

  • Author_Institution
    Sony Corp., Tokyo
  • fYear
    2007
  • fDate
    8-11 Oct. 2007
  • Firstpage
    212
  • Lastpage
    212
  • Abstract
    The results indicate the effectiveness of the DC scan ATPG algorithm for transition fault detection in actual designs. Even though the at-speed toggle of the scan enable signal needs some DFT assistance such as pipelining, the classical DC scan ATPG algorithm seems worth considering for the first pass of AC scan ATPG runs.
  • Keywords
    automatic test pattern generation; boundary scan testing; fault simulation; logic testing; AC scan ATPG; DC scan ATPG algorithm; DC scan tests; transition fault detection; transition fault simulation; AC generators; Algorithm design and analysis; Automatic test pattern generation; Compaction; Costs; DC generators; Fault detection; Manufacturing; Semiconductor device testing; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Asian Test Symposium, 2007. ATS '07. 16th
  • Conference_Location
    Beijing
  • ISSN
    1081-7735
  • Print_ISBN
    978-0-7695-2890-8
  • Type

    conf

  • DOI
    10.1109/ATS.2007.50
  • Filename
    4388012