Title :
Universal test sets for logic networks
Author :
Akers, Sheldon B., Jr.
Abstract :
This paper examines the problem of finding a single universal test set that will test any of a variety of different implementations of a given switching function. It is shown that, for and/or networks, universal test sets may be found which detect not only all single faults but all multiple faults as well. The minimality and size of these sets are examined and their derivation for incomplete and multiple-output functions is described. The extension of these results to other network types is discussed.
Keywords :
Circuit faults; Circuit testing; Electronic equipment testing; Fault detection; Fault diagnosis; Laboratories; Logic design; Logic testing; Microelectronics; Performance evaluation;
Conference_Titel :
Switching and Automata Theory, 1972., IEEE Conference Record of 13th Annual Symposium on
Conference_Location :
USA
DOI :
10.1109/SWAT.1972.30