Title :
CBIC-V, a new very high speed complementary silicon bipolar IC process
Author :
Feygenson, A. ; Osenbach, J.W. ; Buchanan, W.L. ; Bastek, J.J.
Author_Institution :
AT&T Bell Lab., Reading, PA, USA
Abstract :
A complementary silicon bipolar process development for high-performance 5-V analog and mixed analog-digital applications is discussed. The process yields fast vertical pnp transistors (f T≈5 GHz at 3 V) and npn transistors (fT≈13 GHz at 3 V). A selective epitaxial growth technique is used for active device fabrication to achieve compact and planar dielectric component isolation. For a reduced thermal budget, rapid thermal annealing and low-temperature chemical-vapor-deposited dielectrics are used extensively. Circuit components are interconnected by two-level Ti-Pt-Au metallization
Keywords :
annealing; bipolar integrated circuits; chemical vapour deposition; elemental semiconductors; epitaxial growth; integrated circuit technology; metallisation; semiconductor epitaxial layers; silicon; 5 to 13 GHz; 5 to 3 V; CBIC; CBIC-V; RTA; SEG; Si; Ti-Pt-Au metallization; active device fabrication; analog IC; complementary bipolar IC technology; fast vertical pnp transistors; low-temperature chemical-vapor-deposited dielectrics; mixed analog-digital; mixed mode ICs; npn transistors; planar dielectric component isolation; rapid thermal annealing; selective epitaxial growth technique; two-level metallisation; Analog integrated circuits; Analog-digital conversion; Analog-digital integrated circuits; Application specific integrated circuits; Bipolar integrated circuits; Epitaxial growth; Fabrication; High speed integrated circuits; Silicon; Very high speed integrated circuits;
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1989., Proceedings of the 1989
Conference_Location :
Minneapolis, MN
DOI :
10.1109/BIPOL.1989.69485
