DocumentCode
2206435
Title
A VLSI architecture for image geometrical transformations using an embedded core based processor
Author
Miro, Carolina ; Darbel, Nicolas ; Pacalet, Renaud ; Paquet, Valerie
Author_Institution
Dept. of Electr. Eng., ENST, Paris, France
fYear
1997
fDate
14-16 Jul 1997
Firstpage
86
Lastpage
95
Abstract
This paper presents a circuit dedicated to real time geometrical transforms of pictures. The supported transforms are third degree polynomials of two variables. The post-processing is performed by a bilinear filter. An embedded DSP core is in charge of high level, low rate, control tasks while a set of hard wired units is in charge of computing intensive low level tasks
Keywords
VLSI; digital signal processing chips; image processing; polynomials; VLSI architecture; bilinear filter; embedded DSP core; embedded core based processor; hard wired units; image geometrical transformations; intensive low level tasks; real time geometrical transforms; third degree polynomials; Cameras; Circuits; Digital signal processing; Foundries; Frequency; Image coding; Image processing; Optical distortion; Polynomials; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors, 1997. Proceedings., IEEE International Conference on
Conference_Location
Zurich
ISSN
2160-0511
Print_ISBN
0-8186-7959-X
Type
conf
DOI
10.1109/ASAP.1997.606815
Filename
606815
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