DocumentCode :
2210371
Title :
Algorithms for address assignment in DSP code generation
Author :
Leupers, R. ; Marwedel, P.
Author_Institution :
Dept. of Comput. Sci., Dortmund Univ., Germany
fYear :
1996
fDate :
10-14 Nov. 1996
Firstpage :
109
Lastpage :
112
Abstract :
This paper presents DSP code optimization techniques, which originate from dedicated memory address generation hardware. We define a generic model of DSP address generation units. Based on this model we present efficient heuristics for computing memory layouts for program variables, which optimize utilization of parallel address generation units. Improvements and generalizations of previous work are described, and the efficacy of the proposed algorithms is demonstrated through experimental evaluation.
Keywords :
circuit optimisation; digital signal processing chips; high level synthesis; logic CAD; DSP code generation; address assignment algorithms; code optimization; dedicated memory address generation hardware; generic model; heuristics; memory layouts; parallel address generation units; program variables; Algorithm design and analysis; Computer science; Concurrent computing; Digital signal processing; Hardware; Program processors; Registers; Semiconductor optical amplifiers; Software algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1996. ICCAD-96. Digest of Technical Papers., 1996 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-8186-7597-7
Type :
conf
DOI :
10.1109/ICCAD.1996.569409
Filename :
569409
Link To Document :
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