Impact of 3D design choices on manufacturing cost

Author

Velenis, Dimitrios ; Stucchi, Michele ; Marinissen, Erik Jan ; Swinnen, Bart ; Beyne, Eric

Author_Institution

IMEC, Leuven, Belgium

fYear

2009

fDate

28-30 Sept. 2009

Firstpage

1

Lastpage

5

Abstract

The available options in 3D IC design and manufacturing have different impact on the cost of a 3D System-on-Chip. Using the 3D cost model developed at IMEC, the cost of different system integration options is analyzed and the cost effectiveness of different technology solutions is demonstrated. The cost model is based on the IMEC 3D integration process flows and includes the cost of manufacturing equipment, fabrication facilities, personnel, and materials. Using the IMEC 3D cost model, the cost of various 3D stacking strategies is compared to single die (i.e. 2D) integration. In addition, the effect on cost of different Through-Silicon-Via (TSV) manufacturing technologies is evaluated. The effectiveness of different 3D testing strategies and their impact on system cost is also investigated.

Keywords

integrated circuit design; integrated circuit technology; integrated circuits; 3D IC design; 3D cost model; 3D integration process flow; 3D stacking; 3D system-on-chip; 3D testing strategy; cost effectiveness; integrated circuit; manufacturing cost; single die integration; system integration option; through silicon via manufacturing technology; Costs; Fabrication; Manufacturing processes; Personnel; Stacking; System testing; System-on-a-chip; Three-dimensional integrated circuits; Through-silicon vias; Virtual manufacturing;

fLanguage

English

Publisher

ieee

Conference_Titel

3D System Integration, 2009. 3DIC 2009. IEEE International Conference on

Conference_Location

San Francisco, CA

Print_ISBN

978-1-4244-4511-0

Electronic_ISBN

978-1-4244-4512-7

Type

conf

DOI

10.1109/3DIC.2009.5306575

Filename

5306575