DocumentCode
2215428
Title
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
Author
Arnesen, Adam ; Ellsworth, Kevin ; Gibelyou, Derrick ; Haroldsen, Travis ; Havican, Jared ; Padilla, Marc ; Nelson, Brent ; Rice, Michael ; Wirthlin, Michael
Author_Institution
Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA
fYear
2010
fDate
Aug. 31 2010-Sept. 2 2010
Firstpage
538
Lastpage
543
Abstract
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity is obtained by leveraging a highly parameterized library of communication specific cores. These cores are described in IP-XACT XML with vendor extensions describing the timing behavior of their communication interfaces. A synthesis tool, called Ogre, was created that generates the communication interfaces between cores described in IP-XACT and synthesizes full designs from structural synchronous dataflow specifications. Design productivity improvements are demonstrated with several radio receiver designs.
Keywords
CAD; microprocessor chips; telecommunication computing; IP core reuse strategy; IP-XACT XML; Ogre; communication circuit; communication interface; design productivity; digital radio receiver; meta-data encapsulation; radio receiver design; structural synchronous dataflow specification; IP Integration Tool; IP Reuse; IP-XACT; Synthesis; XML;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2010 International Conference on
Conference_Location
Milano
ISSN
1946-1488
Print_ISBN
978-1-4244-7842-2
Type
conf
DOI
10.1109/FPL.2010.106
Filename
5694307
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