DocumentCode
2216907
Title
On lower bounds for scheduling problems in high-level synthesis
Author
Narasimhan, M. ; Ramanujan, J.
Author_Institution
lntel Corporation
fYear
2000
fDate
2000
Firstpage
546
Lastpage
551
Keywords
Centralized control; Clocks; Delay; Flow graphs; High level synthesis; Linear programming; Permission; Processor scheduling; Scheduling algorithm; Time factors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN
1-58113-187-9
Type
conf
DOI
10.1109/DAC.2000.855371
Filename
855371
Link To Document