Speed-up of PEEC EM/Ckt solver using rank-reduced waveform relaxation

The solution of EM/Circuit problems is important for the EMC/SI/PI system designs. An essential issue today is the solution of larger problems without excessive memory and compute time requirements. In this paper, we show the potential for a new speed-up approach using the PEEC method. One source of the speed-up is due to the use of the waveform relaxation (WR) technique, which is very suitable for parallel processing. Importantly, the dense part of the partial inductance and potential matrices are sparsified by taking advantage of the rank deficiency of the dense parts of the MNA matrix. We show that both time as well as storage can be saved.