DocumentCode :
2217792
Title :
The use of carry-save representation in joint module selection and retiming
Author :
Yu, Zhan ; Khoo, Kei-Yong ; Willson, Alan N., Jr.
Author_Institution :
University of California
fYear :
2000
fDate :
2000
Firstpage :
768
Lastpage :
773
Keywords :
Adders; Arithmetic; Circuits; Cost function; Permission; Propagation delay; Runtime; Signal representations; Signal synthesis; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings 2000
Print_ISBN :
1-58113-187-9
Type :
conf
DOI :
10.1109/DAC.2000.855417
Filename :
855417
Link To Document :
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