DocumentCode
2220046
Title
Reducing cache contention in a multi-core processor via a scheduler
Author
Shekofteh, S. Kazem ; Deldari, Hossein ; Khalkhali, Maryam Baradaran
Author_Institution
Dept. of Comput. Eng., Ferdowsi Univ. of Mashhad, Mashhad, Iran
Volume
6
fYear
2010
fDate
20-22 Aug. 2010
Abstract
Multi-core architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance. Well scheduling of running threads on these processors will result in achieving higher performance. Modern multi-core systems are designed to allow clusters of cores to share various hardware structures, such as last-level caches, memory controllers, and interconnections, as well as prefetching hardware. Without considering these shared resources, scheduling the threads will cause serious degradation in overall performance of the system. In this paper we propose a novel algorithm to schedule the threads that considers these potential contentions to keep away from. The simulation results showed that the proposed scheduler would avoid from lots of contentions between threads on various resources especially on shared caches.
Keywords
cache storage; multi-threading; multiprocessing systems; processor scheduling; cache contention; multicore architectures; multicore processor; running threads scheduling; component; multi-core architecture; resource contention; shared cache; thread scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Computer Theory and Engineering (ICACTE), 2010 3rd International Conference on
Conference_Location
Chengdu
ISSN
2154-7491
Print_ISBN
978-1-4244-6539-2
Type
conf
DOI
10.1109/ICACTE.2010.5579213
Filename
5579213
Link To Document