Title :
Evaluating high-speed link performance using direct end-to-end measurement
Author :
Ye, Chunfei ; Xiao, Kai ; Johnston, Michael ; Cuadras, Ricardo U Chavez ; Ye, Xiaoning
Author_Institution :
Intel Archit. Group, Intel Corp., DuPont, WA, USA
Abstract :
A measurement based methodology is introduced to evaluate die-to-die link performance for high-speed IOs. The die-to-die link is from TX silicon pad to RX pad and incorporates all the storage IO interconnect components. A BERT scope is used as the TX buffer driving signal into a bare chipset package at the bumps with adjustable TX jitter, Vswing, de-emphasis, etc. An oscilloscope is used as the RX buffer receiving signal at the hard disk drive pad with scope built-in features such as DFE and CTLE. This methodology can be used to evaluate link die-die to performance before silicon tape out, to de-couple system issues between silicon and interconnect, to provide input for new spec development, to correlate simulation and measurement and to explore solution space envelope. This method does not call for a specially designed test vehicles. Test examples are introduced for a 6Gbps link to demonstrate the methodology and to evaluate the interconnect healthiness.
Keywords :
disc drives; elemental semiconductors; hard discs; integrated circuit interconnections; integrated circuit measurement; integrated circuit packaging; silicon; BERT scope; CTLE; DFE; RX silicon pad; TX buffer driving signal; TX silicon pad; adjustable TX jitter; bit rate 6 Gbit/s; die-to-die link performance evaluation; direct end-to-end measurement; hard disk drive pad; high-speed IO; high-speed link performance evaluation; measurement based methodology; storage IO interconnect components; Bit error rate; Decision feedback equalizers; Jitter; Receivers; Silicon; Synthetic aperture sonar; Transmitters;
Conference_Titel :
Electromagnetic Compatibility (EMC), 2012 IEEE International Symposium on
Conference_Location :
Pittsburgh, PA
Print_ISBN :
978-1-4673-2061-0
DOI :
10.1109/ISEMC.2012.6351787