High performance bipolar MSI standard logic using standard cells

A 9-bit bidirectional latchable transceiver with parity generate and check is discussed. The circuit was designed and constructed using innovative design techniques, bipolar standard cells on a mature process and a generic place-and-route tool. The requirements were to have a single V/sub CC/ and ground and to meet high performance objectives and package limitations. The design was implemented using a combination of TTL I/O cells and ECL internal circuitry. With the exception of layout verification, the tools used were generic. The circuit innovations are examined, and the output buffer and translation, input buffer, and routing tool are discussed. The methodology and innovations used can be applied to other MSI applications.<>