Application Specific Low Latency Instruction Cache for NAND Flash Memory Based Embedded Systems

In embedded systems, the demand for high capacity and updatable code storage increases as the amount of code grows. NAND Flash memory is one of the most popular storage solutions for this purpose. However, an extremely long access latency makes the NAND flash memory less attractive in the domain of code storage solutions. In this paper, we introduce a highly effective cache system which utilizes application specific HotSpot information and a HotSpot-aware prefetching technique to effectively hide the long latency of the NAND flash memory based code storage systems. To lessen the negative impact of the extremely long access latency, we propose a page prefetching algorithm utilizing HotSpot information which provides a temporal distance sufficient to load a page from the physical NAND flash memory. The experimental results show that our proposed architecture exhibits up to 96% reduction of the average access time, and the juxtaposition of the HotSpot cache and the HotSpot-aware prefetching demonstrates enhancement by nearly two orders of magnitude, up to 98.3% reduction in time, over a basic direct mapped L1 cache architecture.