DocumentCode :
2222804
Title :
An MDCT Hardware Accelerator for MP3 Audio
Author :
Dai, Xingdong ; Wagh, Meghanad D.
Author_Institution :
LSI Corp., Allentown, PA
fYear :
2008
fDate :
8-9 June 2008
Firstpage :
121
Lastpage :
125
Abstract :
With the increasing popularity of MP3 audio, there is a need to develop cost and power efficient architectures for the MP3 encoder and decoder. This paper describes dedicated architectures for computing the modified discrete cosine transform (MDCT) and its inverse (IMDCT). Recent profiling studies have shown that these operations represent about 30% of the total MP3 computations. MP3 format defines two frame sizes that can occur in the same data stream. We have developed the most efficient algorithms for MDCT and IMDCT suitable for both sizes. Unlike previous algorithms, our computations can be unified in a single ASIC architecture. This unified architecture implemented in 90 nm TSMC library is still 25% smaller and 25% faster than any previous single frame size architectures designed in the same technology. In addition, at 128 Kbits/sec data rates, our algorithms save nearly 1800 multiplications per second (18%) which can help reduce the power consumption.
Keywords :
application specific integrated circuits; audio equipment; discrete cosine transforms; MDCT hardware accelerator; MP3 audio; TSMC library; modified discrete cosine transform; power consumption reduction; power efficient architectures; single ASIC architecture; Audio compression; Computer architecture; Costs; Decoding; Digital audio players; Discrete cosine transforms; Filter bank; Hardware; Partitioning algorithms; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Processors, 2008. SASP 2008. Symposium on
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-2333-0
Electronic_ISBN :
978-1-4244-2334-7
Type :
conf
DOI :
10.1109/SASP.2008.4570796
Filename :
4570796
Link To Document :
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