DocumentCode
2226321
Title
Multi-layer low-temperature deposited CMOS photonics for microelectronics backend integration
Author
Sherwood-Droz, Nicolás ; Lipson, Michal
Author_Institution
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
fYear
2011
fDate
1-6 May 2011
Firstpage
1
Lastpage
2
Abstract
We experimentally show vertically-stacked, multi-layer, low-temperature deposited photonics for integration on processed electronics. Waveguides, microrings, and crossings are fabricated out of 400°C PECVD Si3N4, in a two layer configuration.
Keywords
CMOS integrated circuits; integrated optics; Si3N4; crossings; microelectronics backend integration; microrings; multilayer low-temperature deposited CMOS photonics; temperature 400 degC; two layer configuration; waveguides; CMOS process; Optical films; Optical imaging; Optical resonators; Optical waveguides; Photonics; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Lasers and Electro-Optics (CLEO), 2011 Conference on
Conference_Location
Baltimore, MD
Print_ISBN
978-1-4577-1223-4
Type
conf
Filename
5950075
Link To Document