Title :
Organizing and storing of discretized BEM equations in 3D multi-dielectric parasitic capacitance extraction
Author :
Yu, Wenjian ; Wang, Zeyi
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Abstract :
An efficient approach to organize and store the discretized BEM equations is proposed for 3-D multi-dielectric parasitic capacitance extraction. With source points and unknowns properly sorted, non-zero entries are distributed regularly in the coefficient matrix of the overall system equation. A structure of length-varied 2-D arrays is designed to store the non-zero blocks of the coefficient matrix. Therefore, the additional CPU consumption brought by a large number of dielectric regions is reduced significantly. Experimental results show that the proposed approach improves the efficiency of equation solution greatly, especially for quasi-multiple medium (QMM) accelerated computation. Besides, the analysis reveals that the proposed organizing approach is flexible enough to suit arbitrary complex topological relationships of dielectrics
Keywords :
VLSI; boundary-elements methods; capacitance; integrated circuit interconnections; integrated circuit layout; matrix algebra; 3D multi-dielectric parasitic capacitance extraction; CPU consumption reduction; IC interconnects; VLSI layout; arbitrary complex topological relationship; coefficient matrix; deep sub-micron VLSI circuits; dielectric regions; discretized BEM equations; length-varied 2-D array; organizing approach; quasi-multiple medium accelerated computation; Acceleration; Central Processing Unit; Circuit optimization; Dielectrics; Finite difference methods; Integrated circuit interconnections; Laplace equations; Organizing; Parasitic capacitance; Very large scale integration;
Conference_Titel :
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6677-8
DOI :
10.1109/ICASIC.2001.982654
