DocumentCode :
2229284
Title :
Adiabatic NP-domino circuits
Author :
Wu, Xunwei ; Liu, Xiao ; Hu, Jianping
Author_Institution :
Inst. of Circuits & Syst., Ningbo Univ., China
fYear :
2001
fDate :
2001
Firstpage :
884
Lastpage :
887
Abstract :
In view of changing the type of energy conversion in CMOS circuits, this paper investigates low power CMOS circuits adopting AC power supply. First, we discuss the algebraic expressions and the corresponding properties of clocked signals. Then, based on summing up the traditional domino circuit design, the design of NP-domino circuits adopting power-clock is proposed in this paper. We carry out PSPICE simulations for the four-stage clocked NP-domino circuit by using sinusoidal power-clock, and demonstrate that the circuit has correct logic function and the working characteristic of energy recovery
Keywords :
CMOS logic circuits; SPICE; circuit CAD; clocks; integrated circuit design; low-power electronics; AC power supply; CMOS circuits; NP-domino circuits; PSPICE simulations; algebra; clocked signals; domino circuit design; energy conversion; energy recovery; logic function; low power CMOS circuits; sinusoidal power-clock; Boolean algebra; Capacitance; Circuits; Clocks; Energy conversion; Logic; Magnetic fields; Power supplies; Resistance heating; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2001. Proceedings. 4th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6677-8
Type :
conf
DOI :
10.1109/ICASIC.2001.982706
Filename :
982706
Link To Document :
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