Current status and challenges of SoC verification for embedded systems market

The SoC has become an indispensable solution in the embedded systems market. This tutorial introduces today´s main issues of SoC design with a focus on the verification solutions proposed by EDA vendors and SoC developers. After the SoC platform based on several embedded cores is fixed, design efforts are focused on the verification of peripheral IPs and debugging of the software in the context of the platform. For IP verification, formal methods are first used when applicable and suitable to statically remove design bugs and improve coverage, and test-bench automation tools are applied to test the IP with realistic test vectors. Finally, all the IPs are mapped in FPGA in the emulator, to be verified in the real operating environment. For integrated system verification, the emulation environment is set up as soon as the platform is selected and the block-level partitioning is done. A well-established emulation platform helps progressive refinement of newly added SoC components and early development and verification of the software.