CMOS Temperature Sensor Using Periodic Averaging for Error Reduction

A fully integrated temperature sensor is implemented in a 0.35 mum CMOS technology. Sensor can measure the temperature with maximum inaccuracy of plusmn0.27degC (max) over temperature range of -40degC to +85 degC. Parasitic substrate pnp transistors are used for temperature sensing. Dynamic element matching (DEM) technique is used to reduce the effect of matching errors of components. An on-chip clock source, control logic, low-pass filter and an output buffer are added to the PTAT sensor core. Further spread of components is decreased by using gain calibration at room temperature. The total power consumption of the sensor is 327 muW of which 130 muW is consumed by sensor core. The active chip area is 0.64 mm².