DocumentCode :
2235635
Title :
High-speed cell scheduling for router backplanes
Author :
Serpanos, D.N. ; Antoniadis, P.I.
Author_Institution :
Dept. of Comput. Sci., Crete Univ., Greece
fYear :
2000
fDate :
2000
Firstpage :
65
Lastpage :
71
Abstract :
The performance of the Internet and intranets depends heavily on the characteristics of routers. The use of switched backplanes in routers provides an important direction in communication system architecture and promises to increase dramatically their ability to switch IP packets. We describe the main features of router architectures focusing on schedulers for switched backplanes. We introduce a classification for available algorithms identifying their basic features. We demonstrate that new schedulers can be developed by enforcing fairness and by incorporating features that have been used separately in the past as the classification shows. This leads to switches that provide higher performance than conventional ones, as we demonstrate with the description of a class of such algorithms
Keywords :
Internet; intranets; packet switching; queueing theory; telecommunication network routing; transport protocols; IP packets switching; Internet; communication system architecture; distributed scheduling algorithm; fairness; high-speed cell scheduling; high-speed links; high-speed transmission; input queueing; intranets; performance; router architectures; router backplanes; schedulers; switched backplanes; switches; Backplanes; Communication switching; Computer science; Data mining; Memory management; Packet switching; Routing; Switches; Throughput; Transport protocols;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Switching and Routing, 2000. ATM 2000. Proceedings of the IEEE Conference on
Conference_Location :
Heidelberg
Print_ISBN :
0-7803-5884-8
Type :
conf
DOI :
10.1109/HPSR.2000.856648
Filename :
856648
Link To Document :
بازگشت