DocumentCode
2236574
Title
Testability analysis method for hardware and software based on assertion libraries
Author
Kaminska, M. ; Prikhodchenko, Roman ; Kubirya, Artem ; Mocar, Pavel
Author_Institution
Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine
fYear
2008
fDate
9-12 Oct. 2008
Firstpage
163
Lastpage
167
Abstract
Testability analysis method for software and hardware products, which represented by system level as a composition of control and operational automata is offered. Methodology of bottlenecks selection for assertions implementation in program code is proposed.
Keywords
design for testability; hardware-software codesign; assertion library; operational automata; program code; software and hardware products; testability analysis method; Automata; Circuit faults; Controllability; Observability; Registers; Software; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2008 East-West
Conference_Location
Lviv
Print_ISBN
978-1-4244-3402-2
Electronic_ISBN
978-1-4244-3403-9
Type
conf
DOI
10.1109/EWDTS.2008.5580146
Filename
5580146
Link To Document