DocumentCode
2237150
Title
FPGA Based Parallel Architectures for Normalized Cross-Correlation
Author
Wang, Xiaotao ; Wang, Xingbo
Author_Institution
Coll. of Astronaut., Nanjing Univ. of Aeronaut. & Astronaut., Nanjing, China
fYear
2009
fDate
26-28 Dec. 2009
Firstpage
225
Lastpage
229
Abstract
As a similarity measure, normalized cross-correlation has found application in a broad range of image processing. A dedicated hardware implementation of normalized cross-correlation is crucial for the requirements of real-time high-speed tasks such as automatic target matching, recognition and tracking. Two efficient parallel architectures for real-time implementation of normalized cross-correlation using field programmable gate array (FPGA) are proposed in this paper. In these architectures, several novel efficient approaches are proposed to reduce logic resource usage and computation time. These two architectures can be applied in different situations according to the practical available resource of the FPGA chip used. Function and timing simulation with Quartus II 8.0 and practical experiment in target recognition using image matching have shown that these architectures can effectively improve the speed performance of the practical target recognition system.
Keywords
correlation methods; field programmable gate arrays; image matching; object recognition; parallel architectures; target tracking; FPGA; Quartus II 8.0; field programmable gate array; image matching; normalized cross-correlation; parallel architectures; similarity measure; target recognition; timing simulation; Computational modeling; Computer architecture; Field programmable gate arrays; Hardware; Image processing; Parallel architectures; Programmable logic arrays; Target recognition; Target tracking; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Science and Engineering (ICISE), 2009 1st International Conference on
Conference_Location
Nanjing
Print_ISBN
978-1-4244-4909-5
Type
conf
DOI
10.1109/ICISE.2009.603
Filename
5455708
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