Reliability challenges of advanced CMOS process and product development: design and application aware qualification

Summary form only given. As advanced technology process rapidly migrates, more than Moore approach, with pursuing cutting-edge performance, power and area scaling, revolutionary introduction of new material, process and structure will tax traditional reliability target (spec) being continuously adopted for advanced CMOS process qualification to handle reliability concerns with finer granurality. Although ICs for all applications are currently coming from the same technology node and production line, silicon technology developers face technical juggernauts without the definition of application and associated reliability target, based on physics-based degradation model and circuit/system reliability simulation. Since future technology market is going to be driven by reliability-cost and reliability-performance, design aware and application specific reliability qualification is a critical topic needs a full attention in connection to silicon technology users.