• DocumentCode
    2237833
  • Title

    Comparative study of geometry-dependent capacitances of planar FETs and double-gate FinFETs: Optimization and process variation

  • Author

    Sohn, Chang-Woo ; Kang, Chang Yong ; Baek, Rock-Hyun ; Choi, Do-Young ; Sagong, Hyun Chul ; Jeong, Eui-Young ; Jeong-Soo Lee ; Kirsch, Paul ; Jammy, Raj ; Lee, Jeong-Soo ; Jeong, Yoon-Ha

  • Author_Institution
    SEMATECH, Austin, TX, USA
  • fYear
    2012
  • fDate
    23-25 April 2012
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    We quantitatively compared the parasitic capacitance of the planar FETs and the DG FinFETs. Optimization with a fixed Sfin-to-Hfin ratio significantly reduces Cpara/W, which renders DG FinFETs comparable to planar FETs. Process variation on Wfin and Hfin should be controlled, otherwise, the Cpara uniformity will be worse for DG FinFETs than it is planar FETs.
  • Keywords
    MOSFET; optimisation; double-gate FinFET; geometry-dependent capacitances; optimization; parasitic capacitance; planar FET; process variation; Capacitance; Degradation; FinFETs; Geometry; Logic gates; Statistical distributions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications (VLSI-TSA), 2012 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1930-8868
  • Print_ISBN
    978-1-4577-2083-3
  • Type

    conf

  • DOI
    10.1109/VLSI-TSA.2012.6210129
  • Filename
    6210129
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2237833