DocumentCode
2239892
Title
Constructing lower and upper bounded delay routing trees using linear programming
Author
Oh, Jaewon ; Pyo, Iksoo ; Pedram, Massoud
Author_Institution
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear
1996
fDate
3-7 Jun, 1996
Firstpage
401
Lastpage
404
Abstract
This paper presents a new approach for solving the Lower and Upper Bounded delay routing Tree (LUBT) problem using linear programming. LUBT is a Steiner tree rooted at the source node such that delays from the source to sink nodes lie between the given lower and upper bounds. We show that our proposed method produces minimum cost LUBT for a given topology under a linear delay model. Unlike recent works which control only the difference between the maximum and the minimum source-sink delay, we construct routing trees which satisfy distinct lower and upper bound constraints on the source-sink delays. This formulation exploits all the flexibility that is present in low power and high performance clock routing tree design
Keywords
circuit analysis computing; linear programming; network routing; trees (mathematics); Lower and Upper Bounded delay routing Tree; Steiner tree; linear programming; minimum cost LUBT; source-sink delays; Clocks; Costs; Delay effects; Delay lines; Linear programming; Permission; Power dissipation; Routing; Upper bound; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference Proceedings 1996, 33rd
Conference_Location
Las Vegas, NV
ISSN
0738-100X
Print_ISBN
0-7803-3294-6
Type
conf
DOI
10.1109/DAC.1996.545609
Filename
545609
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